Field of the Invention
The present invention relates to an image processing technique and, more particularly, to a technique of transferring image data.
Description of the Related Art
With recent advances in the resolution and image quality of display and projector products, image processing engines are required to perform complicated image processing at high speed. Such a requirement is mainly met by achieving higher integration and higher operating frequency with advances in semiconductor processes. However, an increase in the electromagnetic radiation of an LSI along with an increase in operating frequency makes it difficult to take countermeasures against EMI (Electro Magnetic Interference). EMI hinders the operations of other devices and affects the human body. It is therefore very important to suppress EMI within a reference value.
As one of the countermeasures against EMI, a so-called SSCG (Spread Spectrum Clock Generator) is used. The SSCG has a function of suppressing the peak of EMI by changing the clock frequency of an LSI to cause oscillation (frequency modulation). In addition, attempts have been made to reduce EMI by decreasing the number of signal pins for outputting signals outside the LSI or suppressing the slew rate at the time of the transition of an output signal.
In order to reduce EMI in the above manner, it is important to combine a plurality of countermeasures. Among these techniques, as a technique for more effectively reducing EMI, “memory control circuit and memory control method” disclosed in Japanese Patent Laid-Open No. 2008-59449 has been proposed.
According to Japanese Patent Laid-Open No. 2008-59449, when data constituted by a plurality of bursts is written in a memory, a plurality of data are generated by changing the order of bursts. Among the plurality of generated data, data exhibiting the lowest frequency of data switching is selected, and the order of the bursts of the selected data is stored as redundancy bits in the memory, together with the above data. An attempt is made to reduce EMI by decreasing the number of times of switching of data lines connected to the memory in the above manner. The technique disclosed in Japanese Patent Laid-Open No. 2008-59449, however, has a problem that it needs a memory area for storing redundancy bits representing the order of bursts.